SiliconForgeDocumentation
Applies to SiliconForge 0.1.2. Check platform limits.
Practical guides for your digital RTL project: install, inspect, change, verify and keep a recoverable history.
Use the start checklist for installation and a first result, or go straight to the runnable first project. For an existing project, choose the task in front of you. SiliconForge assists engineering judgment; it does not replace independent verification.
Getting started
Install SiliconForge
Verify and install Windows x64 or Linux AMD64/ARM64, then open a local project.
Read guide →Your first RTL project
Open native sources, inspect the design and review one bounded change.
Read guide →Telemetry and packet walkthroughs
Inspect two real digital-IP examples and their independent application contracts.
Read guide →Projects and design
Configure project inputs
Understand discovered tops, EDAM build profiles, parameters and include paths.
Read guide →Manage sources and dependencies
Keep native source authority and import reviewed dependencies reproducibly.
Read guide →Navigate architecture and RTL
Trace hierarchy, connections and source without confusing abstraction levels.
Read guide →Version control
Changes and version control
Choose the right Git layer or retained hardware comparison before reviewing a change.
Read guide →Stage and commit local changes
Initialize local Git history and review whole-file staging before committing.
Read guide →Browse history and merge parents
Inspect local refs and immutable commit comparisons without switching branches.
Read guide →Save and compare checkpoints
Keep local engineering snapshots distinct from Git commits and backups.
Read guide →Review hardware differences
Inspect architecture, RTL, source and uncertain matching in a bound comparison.
Read guide →Review and apply candidates
Prepare frozen file candidates and distinguish notes, approval, apply and reject.
Read guide →Recover from stale or conflicted state
Preserve work and recover safely from changed HEAD, index, locks and conflicts.
Read guide →Work with external Git tools
Coordinate local native review with branches, remotes, backups and team Git workflows.
Read guide →AI and review
Verification
Configure engineering tools
Understand tool authority, platform support and why a missing check is not a pass.
Read guide →Read verification evidence
Run checks and interpret revision-bound diagnostics and artifacts.
Read guide →Simulate and inspect waveforms
Check testbench intent and examine bounded VCD/FST signal windows.
Read guide →Synthesis and formal checks
Read netlist evidence, assumptions and solver results without overclaiming.
Read guide →Operations
Activate and manage access
Complete secure activation and distinguish allowances, devices and external costs.
Read guide →Package and export a project
Check readiness, export committed trees and verify offline packages.
Read guide →Update, back up and uninstall
Preserve project history and validate replacement runtimes safely.
Read guide →Diagnose and recover
Preserve projects, isolate failures and prepare a minimal safe support report.
Read guide →Reference
Configuration and automation reference
Discover typed RPC capabilities and diagnostic/source-checkout commands.
Read guide →Keyboard and canvas controls
Navigate scopes and selections with view-aware keyboard controls.
Read guide →Hardware engineering glossary
Distinguish architecture, RTL, netlists, evidence and approval concepts.
Read guide →Need help? Report an issue. Include your application version; never include credentials.